Google has announced two additions to its eighth-generation TPU portfolio, targeting different constraints in AI infrastructure: protecting sensitive workloads during processing and supplying enough memory bandwidth for large contexts.
In its November 9 announcement, Google says TPU 8tx combines existing 8t silicon with fifth-generation AMD EPYC hosts and its low-latency Boardfly network. The configuration is designed for confidential inference, with hardware protection for data and model weights in use, and also supports smaller training workloads.
TPU 8i Max packages two 8i chips together. Google says this doubles compute, SRAM and high-bandwidth-memory bandwidth relative to 8i. These are new system configurations built around existing chips, rather than two new chip architectures.
Google has not specified immediate general availability; deployment teams should confirm access requirements.
